This invention relates generally to redundancy systems and, more specifically, to electronic systems having multiple subsystems or modules, some of which are non-functioning or spare modules.
Many large electronic systems, including wafer-scale integrated circuits and single-chip high capacity random access memories, are fabricated to include spare subsystems or circuit modules that can be used as replacements for defective modules. Modules may be rendered defective during fabrication, or after long periods of use, or upon sustaining physical damage. In any event, it is desirable to be able to reconfigure a system to include a required number of operational modules. The specific function performed by a module is not important from the standpoint of this invention. The modules may be, for example, memory cells or address decoders in a computer system, or they could perform any of a variety of other functions.
One technique for configuring a system to include operational modules is to include fusible links in the integrated circuit chip on which the modules are fabricated. The links can typically be opened by electrical or optical means, but their use has some drawbacks. First, the presence of these links complicates the fabrication process and can lower production yields. Also, the blowing open of fusible links can expose the surface of a chip or wafer to contaminants that degrade circuit performance or prevent proper operation.
Another approach to this problem is to use a central interconnection circuit or mapping unit. The central mapping unit contains a table that relates logical unit numbers or addresses to the physical positions of actual modules. One problem that arises from the use of a central mapping unit is that its complexity and physical size increase geometrically with respect to the number of modules or subsystems that it handles. Another problem is that central mapping units impose delay times that degrade system performance, especially for large numbers of modules.
Accordingly, there is still a need in electronic systems using redundancy, for a technique that will interconnect functional subsystems or modules without using fusible links, and without the complexity and delay times associated with central mapping units. The present invention satisfies this need.